A logic simulator is a software program or electronic device that emulates exactly how the logic it simulates will function. It is primarily used to verify the integrity of new designs, but can also be used to evaluate the performance of new and existing designs. The present invention is a software-driven simulator wherein computer program variables are used to represent boolean logic terms and program statements are used to evaluate the boolean equations of the design.
For further explanation of the logic simulation technique utilized by the present invention, see the copending and commonly assigned application Ser. No. 07/570,120, now U.S. Pat. No. 5,276,854, entitled "METHOD FOR MULTIPLE CPU LOGIC SIMULATION", and filed Aug. 17, 1990, the entire contents of which are hereby incorporated by reference herein.
There are three distinct levels at which a designer may use a logic simulator in the design of a computer system. The first level consists of testing a piece of logic that may be part of a module or I. C. option design. The second level is testing at the module level. Inputs are specified in a special file, and outputs (or any boolean terms) can be monitored to see if they come out as expected. The third level of simulation is at the system level. Simulation at the system level is an efficient and effective way to check the design correctness of control logic and other system aspects which depend on proper interaction of the various modules of the system.
System level simulation allows testing of the system design by emulating the execution of diagnostics, a rigorous test of design correctness. Using diagnostics, one need only check the pass and error counts to determine if a diagnostic passed or failed, and correspondingly the correctness of the design. If it failed, the diagnostic is run again and again while tracing relevant terms, much like probing on a real piece of hardware, or stepping through a program with a debugger to find software problems. Also, with multiple CPU systems (i.e., multiprocessor systems), diagnostics can be used to thoroughly test important areas of the machine design like the memory port and inter-CPU communications logic.
Preferably, the same diagnostics that are to be run in systems test and checkout for the completed hardware itself are the ones that are run in the simulator. Usually, diagnostics that exist for the hardware of prior generations of the system design can be used in whole or in part for this purpose. However, it is not practical to run most real-machine diagnostics in their entirety in a simulator because a software simulation of a CPU "runs" on the order of a million times slower than an actual CPU. For example, a diagnostic that runs 1,000 passes per second on an actual CPU would take over sixteen minutes to complete a single pass in a software-simulation of the CPU. Accordingly, there is a strong need for methods in which to speed up the execution of diagnostics in software-simulated CPUs.